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Trends of Low Voltage Analog Design for Wireless Application
Professor Sudhanshu Shekhar Jamuar, University of Malaya
Wednesday, Sept. 23

Abstract:

The importance of power consciousness is well understood by many in wireless applications.
With the growing experience on the fundamental principles of power conscious design, current
mode approach for low voltage analog designs are now becoming known. Current mode
approach has proven to be a better alternative for a low voltage high performance analog circuit
design. This paper covers the current trends of design techniques for low voltage analog circuit
designs utilizing current mode approach within the CMOS environment. Some of the new
techniques are decoupling scheme, improved current mirror, transistors operating in sub-threshold
region, active cascode scheme and controllable gain. This talk presents the design techniques
applied on various building blocks (i.e LNA, mixer, filter, VCO and VGLNA) of a typical wireless
receiver system including RF circuits using MEMS technology is also included with its role on low
power consumption. These techniques are expected to find use in most analog circuits
emphasizing on low power consumption especially in the wireless applications.

Biography

Speaker’s biography: Sudhanshu S. Jamuar received his M. Tech and Ph. D. in Electrical
Engineering from Indian Institute of Technology, Kanpur, India in 1970 and 1977 respectively. He
worked as Research Assistant, Senior Research Fellow and Senior Research Assistant from
1969 to 1975 at IIT Kanpur. During 1975-76, he was with Hindustan Aeronautics Ltd., Lucknow.
Subsequently he joined the Lasers and Spectroscopy Group in the Physics Department at IIT
Kanpur, where he was involved in the design of various types of Laser Systems. He joined as
Lecturer Electrical Engineering Department at Indian Institute of Technology Delhi in 1977, where
he became Assistant Professor in 1980. He was attached to Bath College of Further Education,
Bath (UK), Aalborg University, Aalborg (Denmark) during 1987 and 2000. He was a Professor in
the Department of Electrical Engineering at IIT Delhi from 1991 to 2003. He was Consultant to
UNESCO during 1996 in Lagos State University, Lagos (Nigeria). He was with University Putra
Malaysia during 1996–97 in the Faculty of Engineering. He was Professor in the Electrical and
Electronic Engineering Department in the Faculty of Engineering, University Putra Malaysia
(Malaysia) since 2001, and he is now with University of Malaya. He has been teaching and
conducting research in the areas of Electronic Circuit Design, Instrumentation and
Communication Systems.

He has coauthored more than 40 papers in International Journals and conferences. He recently
received Taiwan Patent on “A Simulation Circuit Layout Design for Low Voltage, Low Power and
High Performance Type II Current Conveyor”. He is recipient of Meghnad Saha Memorial Award
1976 from IETE, Distinguished Alumni Award from BIT Sindri in 1999, Best paper award in IETE
Journal of Education 2004 from IETE. He also holds the position of independent director on the
Board of Tanla Solutions, which has been ranked sixth in the 2007 Deloitte Technology Fast50 in
India.

He is Senior Member of IEEE and Fellow of Institution of Electronics and Telecommunications
Engineering (India). He is on the Editorial Board of Wireless Personnel Communication Journal.
He is presently the Chapter Chair for IEEE CAS Chapter in Malaysia.