Setup Cadence in VLSI lab:

Welcome to the class “EE5333 Analog Integrated Circuit Design”. This part of the tutorial will help you to setup and the cadence environment. We will use the dummy NCSU-PDK named “FreePDK45” for this course. This PDK is of a representative 45nm process.

Let us begin!

Following are the four steps to setup the cadence and corresponding PDK first time.

Step 1. Create a local working directory in your home folder named as EE5333. Type in the following command in terminal to create such a directory.

$ mkdir ~/EE5333

2. Copy the folder named “FreePDK45nm” from home/class/ee5333ta to the home directory.

$ cp –r  /home/class/ee5333ta/FreePDK45   ~/

Step 2.Copy the file named setup.csh from ~/FreePDK/ncsu_basekit/cdssetup/setup.csh to the directory EE5333.

$ cp  ~/FreePDK45/ncsu_basekit/cdssetup/setup.csh ~/EE5333

Step 3. Now, go to the working directory created in step 1, and “source” the file named setup.csh (which you just copied in step 2).

$ cd ~/EE5333

$ source setup.csh

Step 4. Launch virtuoso CIW.

$ virtuoso &

Done! You should be able to see the cadence virtuoso screen now.

From next time onwards, just use step 3.

Note:

In Design Framework II, your project consists of a library containing the cells used by your circuit. Your cells can also contain components from other libraries. Each cell can have different views (schematic, symbol, etc), accordingly to their purpose. The library Manager can be used to select cells, copy, delete, rename, etc.